Responsibilities and Opportunities

• PCIe sub system logic development and integration including PIPE interface(integrated Phy and controller)
• PCIe sub system micro architecture development
• Logic component(DMA, ATU, ATS and customized features)
• Subsystem glue logics
• PCIe subsystem control firmware development
• LTSSM and power state management
• DMA, ATU, ATS and customized features
• PCIe sub system integrated programable core firmware development
• PCIe hardware-software integration, verification and PCIe(Gen3/4/5) testing
• PCIe protocol(Gen3/4/5) analysis and optimization
• PCIe compliance testing
• PCIe protocol & performance validation and optimization

Key Qualifications

• Minimum of 5 years of experience in PCIe
• Bachelor's or higher degree in Computer Engineering, Electrical Engineering, or a related field
• Deep understanding of PCIe protocol(Gen3/4/5)
• Deep understanding on the PCIe system(DMA, ATU, ATS and customized features)
• Experiences on the LTSSM & power states
• Experiences on the PCIe system integration & PIPE interface(Phy & controller integration)