Data Flow

module comparator_df(
    input [1:0] A, B,
    output A_gt_B, A_eq_B, A_lt_B
);

assign A_eq_B = (A == B);
assign A_gt_B = (A > B);
assign A_lt_B = (A < B);

endmodule

Behavioral / Control Flow Modeling

module comparator_beh(
    input [1:0] A, B,
    output reg A_gt_B, A_eq_B, A_lt_B
);

always @(*) begin
    if (A > B) begin
        A_gt_B = 1;
        A_eq_B = 0;
        A_lt_B = 0;
    end
    else if (A == B) begin
        A_gt_B = 0;
        A_eq_B = 1;
        A_lt_B = 0;
    end
    else begin
        A_gt_B = 0;
        A_eq_B = 0;
        A_lt_B = 1;
    end
end

endmodule

Structural Modeling

module comparator_struct(
    input [1:0] A, B,
    output A_gt_B, A_eq_B, A_lt_B
);

wire A1, A0, B1, B0;
wire eq1, eq0;
wire w1, w2, w3, w4;

assign A1 = A[1];
assign A0 = A[0];
assign B1 = B[1];
assign B0 = B[0];

// Equality (XNOR)
assign eq1 = ~(A1 ^ B1);
assign eq0 = ~(A0 ^ B0);

// A == B
and (A_eq_B, eq1, eq0);

// A > B
and (w1, A1, ~B1);
and (w2, eq1, A0, ~B0);
or  (A_gt_B, w1, w2);

// A < B
and (w3, ~A1, B1);
and (w4, eq1, ~A0, B0);
or  (A_lt_B, w3, w4);

endmodule

Test Bench That would work for all

module comparator_all_tb;

reg [1:0] A, B;

// Outputs for each model
wire gt_df, eq_df, lt_df;
wire gt_beh, eq_beh, lt_beh;
wire gt_str, eq_str, lt_str;

// Instantiate all versions
comparator_df   m1 (.A(A), .B(B), .A_gt_B(gt_df), .A_eq_B(eq_df), .A_lt_B(lt_df));
comparator_beh  m2 (.A(A), .B(B), .A_gt_B(gt_beh), .A_eq_B(eq_beh), .A_lt_B(lt_beh));
comparator_struct m3 (.A(A), .B(B), .A_gt_B(gt_str), .A_eq_B(eq_str), .A_lt_B(lt_str));

initial begin
    $monitor("A=%b B=%b | DF:%b%b%b | BEH:%b%b%b | STR:%b%b%b",
              A, B,
              gt_df, eq_df, lt_df,
              gt_beh, eq_beh, lt_beh,
              gt_str, eq_str, lt_str);

    // All combinations
    A=2'b00; B=2'b00; #10;
    A=2'b00; B=2'b01; #10;
    A=2'b00; B=2'b10; #10;
    A=2'b00; B=2'b11; #10;

    A=2'b01; B=2'b00; #10;
    A=2'b01; B=2'b01; #10;
    A=2'b01; B=2'b10; #10;
    A=2'b01; B=2'b11; #10;

    A=2'b10; B=2'b00; #10;
    A=2'b10; B=2'b01; #10;
    A=2'b10; B=2'b10; #10;
    A=2'b10; B=2'b11; #10;

    A=2'b11; B=2'b00; #10;
    A=2'b11; B=2'b01; #10;
    A=2'b11; B=2'b10; #10;
    A=2'b11; B=2'b11; #10;

    $finish;
end

endmodule